Research and investigate the thermal effects of 3D stacked photons and electronic chips

Hybrid 3D integrated optical transceiver. (A, B) Test setup: Place the photon chip (PIC) on the circuit board (green), and glue the electronic chip (EIC) onto the top of the photon chip. (C) It is the cross-section of the EIC-PIC component with micro protrusions. (D) Display the mesh of the finite element model.

The latest progress in artificial intelligence, more specifically, is the pressure placed on data centers by large language models such as ChatGPT. Artificial intelligence models require a large amount of data for training, and efficient communication links become necessary to move data between processing units and memory.

For decades, optical fiber has been the preferred solution for long-distance communication. For communication within short distance data centers, due to the excellent performance of fiber optic compared to traditional electrical links, the industry is now also adopting fiber optic. Recent technological developments can now even achieve the conversion from electrical interconnection to optical interconnection over very short distances, such as communication between chips within the same package.

This requires converting the data stream from the electrical domain to the optical domain, which occurs in the optical transceiver. Silicon photonics is the most widely used technology for manufacturing these optical transceivers.

The active photon devices inside the chip still need to be connected to electronic drivers to provide power to the devices and read input data. By using 3D stacking technology, electronic chips are stacked directly above photonic chips, achieving tight integration of low parasitic capacitance components.

In a recent study published in the Journal of Optical Microsystems, the thermal effects of this 3D integration were investigated.

The design of photonic chips consists of a series of circular modulators known for their temperature sensitivity. In order to operate in demanding environments such as data centers, they require active thermal stability. This is achieved in the form of an integrated heater. For energy efficiency reasons, it is obvious that the power required for thermal stability should be minimized.

A research team from the University of Leuven and Imec in Belgium measured the heater efficiency before and after EIC flip chip bonding through experiments on PIC. The relative loss of efficiency was found to be -43.3%, which is a significant impact.

In addition, the 3D finite element simulation attributes this loss to thermal diffusion in EIC. This thermal diffusion should be avoided, as ideally, all the heat generated in the integrated heater is contained near the photonic device. After bonding EIC, the thermal crosstalk between photon devices also increased by up to+44.4%, making individual thermal control more complex.

Quantifying the thermal impact of 3D photonic electronic integration is crucial, but preventing loss of heater efficiency is also important. For this reason, thermal simulation studies were conducted, in which typical design variables were changed to improve heater efficiency. The results indicate that by increasing μ The spacing between bumps and photonic devices and the reduction of interconnect linewidth can minimize the thermal loss of 3D integration.

Source: Laser Net